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git://git.openembedded.org/meta-openembedded
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mariadb: update to 10.7.4
LTS version, bugfix only update.
Drop clang-64bit-atomics.patch as the patched code was removed in this update.
cf483a7766
Includes these CVES:
CVE-2022-27458
CVE-2022-27457
CVE-2022-27456
CVE-2022-27455
CVE-2022-27452
CVE-2022-27451
CVE-2022-27449
CVE-2022-27448
CVE-2022-27447
CVE-2022-27446
CVE-2022-27445
CVE-2022-27444
CVE-2022-27387
CVE-2022-27386
CVE-2022-27384
CVE-2022-27383
CVE-2022-27382
CVE-2022-27381
CVE-2022-27380
CVE-2022-27379
CVE-2022-27378
CVE-2022-27377
CVE-2022-27376
Signed-off-by: Armin Kuster <akuster808@gmail.com>
Signed-off-by: Khem Raj <raj.khem@gmail.com>
This commit is contained in:
parent
3277a81937
commit
c1720935bd
@ -20,11 +20,10 @@ SRC_URI = "https://archive.mariadb.org/${BP}/source/${BP}.tar.gz \
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file://mm_malloc.patch \
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file://sys_futex.patch \
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file://mariadb-openssl3.patch \
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file://clang-64bit-atomics.patch \
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"
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SRC_URI:append:libc-musl = " file://ppc-remove-glibc-dep.patch"
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SRC_URI[sha256sum] = "da286919ffc9c913282202349709b6ba4ebcd342815e8dae0aa6b6bd8f515cd4"
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SRC_URI[sha256sum] = "73dd9c9d325520f20ca5e0ef16f94b7be1146bed7e4a78e735c20daebf3a4173"
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UPSTREAM_CHECK_URI = "https://github.com/MariaDB/server/releases"
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@ -1,178 +0,0 @@
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Prevent Clang from emitting atomic libcalls
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Clang expects 8-byte alignment for some 64-bit atomic operations
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in some 32-bit targets. Native instruction lock cmpxchg8b (for x86)
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should only require 4-byte alignment.
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This patch tries to add 8-byte alignents to data needing atomic ops
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which helps clang to not generate the libatomic calls but emit
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builtins directly.
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Upstream-Status: Submitted[https://jira.mariadb.org/browse/MDEV-28162]
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Signed-off-by: Khem Raj <raj.khem@gmail.com>
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--- a/include/my_atomic.h
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+++ b/include/my_atomic.h
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@@ -115,6 +115,16 @@
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#include "atomic/gcc_builtins.h"
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#endif
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+#include <stdint.h>
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+
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+# ifdef __GNUC__
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+typedef __attribute__((__aligned__(8))) int64 ATOMIC_I64;
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+typedef __attribute__((__aligned__(8))) uint64 ATOMIC_U64;
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+# else
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+typedef int64 ATOMIC_I64;
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+typedef uint64 ATOMIC_U64;
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+# endif
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+
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#if SIZEOF_LONG == 4
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#define my_atomic_addlong(A,B) my_atomic_add32((int32*) (A), (B))
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#define my_atomic_loadlong(A) my_atomic_load32((int32*) (A))
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@@ -123,12 +133,12 @@
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#define my_atomic_faslong(A,B) my_atomic_fas32((int32*) (A), (B))
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#define my_atomic_caslong(A,B,C) my_atomic_cas32((int32*) (A), (int32*) (B), (C))
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#else
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-#define my_atomic_addlong(A,B) my_atomic_add64((int64*) (A), (B))
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-#define my_atomic_loadlong(A) my_atomic_load64((int64*) (A))
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-#define my_atomic_loadlong_explicit(A,O) my_atomic_load64_explicit((int64*) (A), (O))
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-#define my_atomic_storelong(A,B) my_atomic_store64((int64*) (A), (B))
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-#define my_atomic_faslong(A,B) my_atomic_fas64((int64*) (A), (B))
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-#define my_atomic_caslong(A,B,C) my_atomic_cas64((int64*) (A), (int64*) (B), (C))
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+#define my_atomic_addlong(A,B) my_atomic_add64((ATOMIC_I64*) (A), (B))
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+#define my_atomic_loadlong(A) my_atomic_load64((ATOMIC_I64*) (A))
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+#define my_atomic_loadlong_explicit(A,O) my_atomic_load64_explicit((ATOMIC_I64*) (A), (O))
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+#define my_atomic_storelong(A,B) my_atomic_store64((ATOMIC_I64*) (A), (B))
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+#define my_atomic_faslong(A,B) my_atomic_fas64((ATOMIC_I64*) (A), (B))
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+#define my_atomic_caslong(A,B,C) my_atomic_cas64((ATOMIC_I64*) (A), (ATOMIC_I64*) (B), (C))
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#endif
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#ifndef MY_MEMORY_ORDER_SEQ_CST
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--- a/storage/perfschema/pfs_atomic.h
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+++ b/storage/perfschema/pfs_atomic.h
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@@ -41,7 +41,7 @@ public:
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}
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/** Atomic load. */
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- static inline int64 load_64(int64 *ptr)
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+ static inline int64 load_64(ATOMIC_I64 *ptr)
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{
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return my_atomic_load64(ptr);
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}
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@@ -53,9 +53,9 @@ public:
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}
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/** Atomic load. */
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- static inline uint64 load_u64(uint64 *ptr)
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+ static inline uint64 load_u64(ATOMIC_U64 *ptr)
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{
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- return (uint64) my_atomic_load64((int64*) ptr);
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+ return (uint64) my_atomic_load64((ATOMIC_I64*) ptr);
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}
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/** Atomic store. */
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@@ -65,7 +65,7 @@ public:
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}
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/** Atomic store. */
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- static inline void store_64(int64 *ptr, int64 value)
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+ static inline void store_64(ATOMIC_I64 *ptr, int64 value)
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{
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my_atomic_store64(ptr, value);
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}
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@@ -77,9 +77,9 @@ public:
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}
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/** Atomic store. */
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- static inline void store_u64(uint64 *ptr, uint64 value)
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+ static inline void store_u64(ATOMIC_U64 *ptr, uint64 value)
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{
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- my_atomic_store64((int64*) ptr, (int64) value);
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+ my_atomic_store64((ATOMIC_I64*) ptr, (int64) value);
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}
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/** Atomic add. */
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@@ -89,7 +89,7 @@ public:
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}
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/** Atomic add. */
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- static inline int64 add_64(int64 *ptr, int64 value)
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+ static inline int64 add_64(ATOMIC_I64 *ptr, int64 value)
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{
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return my_atomic_add64(ptr, value);
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}
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@@ -101,9 +101,9 @@ public:
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}
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/** Atomic add. */
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- static inline uint64 add_u64(uint64 *ptr, uint64 value)
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+ static inline uint64 add_u64(ATOMIC_U64 *ptr, uint64 value)
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{
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- return (uint64) my_atomic_add64((int64*) ptr, (int64) value);
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+ return (uint64) my_atomic_add64((ATOMIC_I64*) ptr, (int64) value);
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}
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/** Atomic compare and swap. */
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@@ -114,7 +114,7 @@ public:
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}
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/** Atomic compare and swap. */
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- static inline bool cas_64(int64 *ptr, int64 *old_value,
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+ static inline bool cas_64(ATOMIC_I64 *ptr, ATOMIC_I64 *old_value,
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int64 new_value)
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{
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return my_atomic_cas64(ptr, old_value, new_value);
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@@ -129,10 +129,10 @@ public:
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}
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/** Atomic compare and swap. */
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- static inline bool cas_u64(uint64 *ptr, uint64 *old_value,
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+ static inline bool cas_u64(ATOMIC_U64 *ptr, ATOMIC_U64 *old_value,
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uint64 new_value)
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{
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- return my_atomic_cas64((int64*) ptr, (int64*) old_value,
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+ return my_atomic_cas64((ATOMIC_I64*) ptr, (ATOMIC_I64*) old_value,
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(uint64) new_value);
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}
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};
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--- a/sql/sql_class.h
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+++ b/sql/sql_class.h
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@@ -1049,7 +1049,7 @@ static inline void update_global_memory_
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(longlong) global_status_var.global_memory_used,
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size));
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// workaround for gcc 4.2.4-1ubuntu4 -fPIE (from DEB_BUILD_HARDENING=1)
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- int64 volatile * volatile ptr= &global_status_var.global_memory_used;
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+ ATOMIC_I64 volatile * volatile ptr= &global_status_var.global_memory_used;
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my_atomic_add64_explicit(ptr, size, MY_MEMORY_ORDER_RELAXED);
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}
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--- a/storage/innobase/include/srv0mon.h
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+++ b/storage/innobase/include/srv0mon.h
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@@ -49,7 +49,7 @@ enum monitor_running_status {
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typedef enum monitor_running_status monitor_running_t;
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/** Monitor counter value type */
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-typedef int64_t mon_type_t;
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+typedef ATOMIC_I64 mon_type_t;
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/** Two monitor structures are defined in this file. One is
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"monitor_value_t" which contains dynamic counter values for each
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@@ -568,7 +568,7 @@ Use MONITOR_INC if appropriate mutex pro
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if (enabled) { \
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ib_uint64_t value; \
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value = my_atomic_add64_explicit( \
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- (int64*) &MONITOR_VALUE(monitor), 1, \
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+ (ATOMIC_I64*) &MONITOR_VALUE(monitor), 1, \
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MY_MEMORY_ORDER_RELAXED) + 1; \
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/* Note: This is not 100% accurate because of the \
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inherent race, we ignore it due to performance. */ \
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@@ -585,7 +585,7 @@ Use MONITOR_DEC if appropriate mutex pro
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if (enabled) { \
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ib_uint64_t value; \
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value = my_atomic_add64_explicit( \
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- (int64*) &MONITOR_VALUE(monitor), -1, \
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+ (ATOMIC_I64*) &MONITOR_VALUE(monitor), -1, \
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MY_MEMORY_ORDER_RELAXED) - 1; \
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/* Note: This is not 100% accurate because of the \
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inherent race, we ignore it due to performance. */ \
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