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be10a6b132
This needs further investigation, but for now we can get the tested sources into the poky gcc harness Signed-off-by: Koen Kooi <k-kooi@ti.com>
133 lines
4.9 KiB
Diff
133 lines
4.9 KiB
Diff
Backport from FSF mainline:
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Mark Shinwell <shinwell@codesourcery.com>
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Julian Brown <julian@codesourcery.com>
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gcc/
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* config/arm/thumb2.md (thumb2_movsi_insn): Split ldr and str
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alternatives according to use of high and low regs.
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* config/arm/vfp.md (thumb2_movsi_vfp): Likewise.
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* config/arm/arm.h (CONDITIONAL_REGISTER_USAGE): Use high regs when
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optimizing for size on Thumb-2.
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2010-07-26 Julian Brown <julian@codesourcery.com>
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Merge from Sourcery G++ 4.4:
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http://gcc.gnu.org/ml/gcc-patches/2006-03/msg00038.html
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=== modified file 'gcc/config/arm/arm.h'
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--- old/gcc/config/arm/arm.h 2010-08-05 15:28:47 +0000
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+++ new/gcc/config/arm/arm.h 2010-08-05 16:34:46 +0000
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@@ -783,12 +783,11 @@
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fixed_regs[regno] = call_used_regs[regno] = 1; \
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} \
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\
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- if (TARGET_THUMB && optimize_size) \
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- { \
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- /* When optimizing for size, it's better not to use \
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- the HI regs, because of the overhead of stacking \
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- them. */ \
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- /* ??? Is this still true for thumb2? */ \
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+ if (TARGET_THUMB1 && optimize_size) \
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+ { \
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+ /* When optimizing for size on Thumb-1, it's better not \
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+ to use the HI regs, because of the overhead of \
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+ stacking them. */ \
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for (regno = FIRST_HI_REGNUM; \
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regno <= LAST_HI_REGNUM; ++regno) \
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fixed_regs[regno] = call_used_regs[regno] = 1; \
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=== modified file 'gcc/config/arm/thumb2.md'
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--- old/gcc/config/arm/thumb2.md 2010-04-02 07:32:00 +0000
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+++ new/gcc/config/arm/thumb2.md 2010-08-05 16:34:46 +0000
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@@ -223,9 +223,14 @@
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(set_attr "neg_pool_range" "*,*,*,0,*")]
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)
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+;; We have two alternatives here for memory loads (and similarly for stores)
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+;; to reflect the fact that the permissible constant pool ranges differ
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+;; between ldr instructions taking low regs and ldr instructions taking high
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+;; regs. The high register alternatives are not taken into account when
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+;; choosing register preferences in order to reflect their expense.
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(define_insn "*thumb2_movsi_insn"
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- [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,r,r,rk,m")
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- (match_operand:SI 1 "general_operand" "rk ,I,K,j,mi,rk"))]
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+ [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,r,r,l, *hk,m,*m")
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+ (match_operand:SI 1 "general_operand" "rk ,I,K,j,mi,*mi,l,*hk"))]
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"TARGET_THUMB2 && ! TARGET_IWMMXT
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&& !(TARGET_HARD_FLOAT && TARGET_VFP)
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&& ( register_operand (operands[0], SImode)
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@@ -236,11 +241,13 @@
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mvn%?\\t%0, #%B1
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movw%?\\t%0, %1
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ldr%?\\t%0, %1
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+ ldr%?\\t%0, %1
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+ str%?\\t%1, %0
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str%?\\t%1, %0"
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- [(set_attr "type" "*,*,*,*,load1,store1")
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+ [(set_attr "type" "*,*,*,*,load1,load1,store1,store1")
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(set_attr "predicable" "yes")
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- (set_attr "pool_range" "*,*,*,*,4096,*")
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- (set_attr "neg_pool_range" "*,*,*,*,0,*")]
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+ (set_attr "pool_range" "*,*,*,*,1020,4096,*,*")
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+ (set_attr "neg_pool_range" "*,*,*,*,0,0,*,*")]
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)
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(define_insn "tls_load_dot_plus_four"
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=== modified file 'gcc/config/arm/vfp.md'
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--- old/gcc/config/arm/vfp.md 2010-07-30 14:17:05 +0000
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+++ new/gcc/config/arm/vfp.md 2010-08-05 16:34:46 +0000
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@@ -86,9 +86,11 @@
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(set_attr "neg_pool_range" "*,*,*,*,4084,*,*,*,*,1008,*")]
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)
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+;; See thumb2.md:thumb2_movsi_insn for an explanation of the split
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+;; high/low register alternatives for loads and stores here.
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(define_insn "*thumb2_movsi_vfp"
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- [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,r,r,rk,m,*t,r, *t,*t, *Uv")
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- (match_operand:SI 1 "general_operand" "rk, I,K,j,mi,rk,r,*t,*t,*Uvi,*t"))]
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+ [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,r,r,l,*hk,m,*m,*t,r, *t,*t, *Uv")
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+ (match_operand:SI 1 "general_operand" "rk, I,K,j,mi,*mi,l,*hk,r,*t,*t,*Uvi,*t"))]
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"TARGET_THUMB2 && TARGET_VFP && TARGET_HARD_FLOAT
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&& ( s_register_operand (operands[0], SImode)
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|| s_register_operand (operands[1], SImode))"
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@@ -102,25 +104,27 @@
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case 3:
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return \"movw%?\\t%0, %1\";
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case 4:
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+ case 5:
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return \"ldr%?\\t%0, %1\";
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- case 5:
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+ case 6:
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+ case 7:
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return \"str%?\\t%1, %0\";
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- case 6:
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+ case 8:
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return \"fmsr%?\\t%0, %1\\t%@ int\";
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- case 7:
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+ case 9:
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return \"fmrs%?\\t%0, %1\\t%@ int\";
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- case 8:
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+ case 10:
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return \"fcpys%?\\t%0, %1\\t%@ int\";
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- case 9: case 10:
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+ case 11: case 12:
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return output_move_vfp (operands);
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default:
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gcc_unreachable ();
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}
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"
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[(set_attr "predicable" "yes")
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- (set_attr "type" "*,*,*,*,load1,store1,r_2_f,f_2_r,fcpys,f_load,f_store")
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- (set_attr "pool_range" "*,*,*,*,4096,*,*,*,*,1020,*")
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- (set_attr "neg_pool_range" "*,*,*,*, 0,*,*,*,*,1008,*")]
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+ (set_attr "type" "*,*,*,*,load1,load1,store1,store1,r_2_f,f_2_r,fcpys,f_load,f_store")
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+ (set_attr "pool_range" "*,*,*,*,1020,4096,*,*,*,*,*,1020,*")
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+ (set_attr "neg_pool_range" "*,*,*,*, 0, 0,*,*,*,*,*,1008,*")]
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)
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