mirror of
git://git.openembedded.org/meta-openembedded
synced 2026-06-09 23:19:09 +00:00
e5c0a0be96
Starting with Linux 6.6, RDCYCLE is a privileged instruction on RISC-V and can't be used directly from userland. This causes 'systemctl start mysqld.service' failed with error: [ 1456.918172] mariadbd[12115]: unhandled signal 4 code 0x1 at 0x000055558689d134 in mariadbd[555585bfa000+14a7000] [ 1456.921772] CPU: 1 PID: 12115 Comm: mariadbd Not tainted 6.6.43-yocto-standard #1 [ 1456.922327] Hardware name: riscv-virtio,qemu (DT) [ 1456.923045] epc : 000055558689d134 ra : 000055558620ea48 sp : 00007fffdc487770 [ 1456.923525] gp : 00005555872ec400 tp : 00007fff89560780 t0 : 0000555587be32e8 [ 1456.923951] t1 : 0000555586886042 t2 : 000000002d6a89f0 s0 : 00007fffdc4877b0 Signed-off-by: Changqing Li <changqing.li@windriver.com> Signed-off-by: Armin Kuster <akuster808@gmail.com>
67 lines
2.5 KiB
Diff
67 lines
2.5 KiB
Diff
From 342f0dd9b4f9fc49dcb589cd98933ea330de55d8 Mon Sep 17 00:00:00 2001
|
|
From: Aurelien Jarno <aurelien@aurel32.net>
|
|
Date: Thu, 4 Jan 2024 11:30:34 +0100
|
|
Subject: [PATCH] RISC-V: use RDTIME instead of RDCYCLE
|
|
|
|
Starting with Linux 6.6 [1], RDCYCLE is a privileged instruction on
|
|
RISC-V and can't be used directly from userland. There is a sysctl
|
|
option to change that as a transition period, but it will eventually
|
|
disappear.
|
|
|
|
Use RDTIME instead, which while less accurate has the advantage of being
|
|
synchronized between CPU (and thus monotonic) and of constant frequency.
|
|
|
|
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=cc4c07c89aada16229084eeb93895c95b7eabaa3
|
|
|
|
Upstream-Status: Backport [https://github.com/MariaDB/server/commit/656f8867720efc1b4dd0969319f35a3e1a2a005e]
|
|
Signed-off-by: Changqing Li <changqing.li@windriver.com>
|
|
---
|
|
include/my_rdtsc.h | 12 ++++++------
|
|
1 file changed, 6 insertions(+), 6 deletions(-)
|
|
|
|
diff --git a/include/my_rdtsc.h b/include/my_rdtsc.h
|
|
index 8b9b0046bc0..21e44847d9a 100644
|
|
--- a/include/my_rdtsc.h
|
|
+++ b/include/my_rdtsc.h
|
|
@@ -111,7 +111,7 @@ C_MODE_START
|
|
On AARCH64, we use the generic timer base register. We override clang
|
|
implementation for aarch64 as it access a PMU register which is not
|
|
guaranteed to be active.
|
|
- On RISC-V, we use the rdcycle instruction to read from mcycle register.
|
|
+ On RISC-V, we use the rdtime instruction to read from mtime register.
|
|
|
|
Sadly, we have nothing for the Digital Alpha, MIPS, Motorola m68k,
|
|
HP PA-RISC or other non-mainstream (or obsolete) processors.
|
|
@@ -211,15 +211,15 @@ static inline ulonglong my_timer_cycles(void)
|
|
}
|
|
#elif defined(__riscv)
|
|
#define MY_TIMER_ROUTINE_CYCLES MY_TIMER_ROUTINE_RISCV
|
|
- /* Use RDCYCLE (and RDCYCLEH on riscv32) */
|
|
+ /* Use RDTIME (and RDTIMEH on riscv32) */
|
|
{
|
|
# if __riscv_xlen == 32
|
|
ulong result_lo, result_hi0, result_hi1;
|
|
/* Implemented in assembly because Clang insisted on branching. */
|
|
__asm __volatile__(
|
|
- "rdcycleh %0\n"
|
|
- "rdcycle %1\n"
|
|
- "rdcycleh %2\n"
|
|
+ "rdtimeh %0\n"
|
|
+ "rdtime %1\n"
|
|
+ "rdtimeh %2\n"
|
|
"sub %0, %0, %2\n"
|
|
"seqz %0, %0\n"
|
|
"sub %0, zero, %0\n"
|
|
@@ -228,7 +228,7 @@ static inline ulonglong my_timer_cycles(void)
|
|
return (static_cast<ulonglong>(result_hi1) << 32) | result_lo;
|
|
# else
|
|
ulonglong result;
|
|
- __asm __volatile__("rdcycle %0" : "=r"(result));
|
|
+ __asm __volatile__("rdtime %0" : "=r"(result));
|
|
return result;
|
|
}
|
|
# endif
|
|
--
|
|
2.25.1
|
|
|