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Changelog: ========== - Fixes to alpha componet in HCY, HSL, HSV and YCbCr models. - Use same CIE Lab conversion for start/end as rest with SIMD. - Remove reliance on set rounding mode. Signed-off-by: Wang Mingyu <wangmy@fujitsu.com> Signed-off-by: Khem Raj <raj.khem@gmail.com>