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commit 3613b2780a6b5d5d70ea6802be5060a8214cbdb5 from git://github.com/renesas-rcar/meta-renesas The renesas rcar SoC H3/M3 is big.LITTLE architecture(cortex-a57.cortex-a53). In order to optimize the performance of the code running on SoC H3/M3, add a tune file for ARM Cortex-A53-Cortex-A57. Create this tune file by refering GCC doc, 3.18.5 ARM Options. (From OE-Core rev: 7e0c9290a9971b92bcb313742f126ca7488d91c3) Signed-off-by: Meng Li <Meng.Li@windriver.com> Signed-off-by: Ross Burton <ross.burton@intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
19 lines
951 B
HTML
19 lines
951 B
HTML
DEFAULTTUNE ?= "cortexa57-cortexa53"
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require conf/machine/include/arm/arch-armv8a.inc
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TUNEVALID[cortexa57-cortexa53] = "Enable big.LITTLE Cortex-A57.Cortex-A53 specific processor optimizations"
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TUNECONFLICTS[aarch64] = "armv4 armv5 armv6 armv7 armv7a"
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TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "aarch64", " -march=armv8-a", "" ,d)}"
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MACHINEOVERRIDES =. "${@bb.utils.contains("TUNE_FEATURES", "cortexa57-cortexa53", "cortexa57-cortexa53:", "" ,d)}"
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TUNE_CCARGS .= "${@bb.utils.contains("TUNE_FEATURES", "cortexa57-cortexa53", " -mtune=cortex-a57.cortex-a53", "", d)}"
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# Little Endian base configs
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AVAILTUNES += "cortexa57-cortexa53"
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ARMPKGARCH_tune-cortexa57-cortexa53 = "cortexa57-cortexa53"
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TUNE_FEATURES_tune-cortexa57-cortexa53 = "${TUNE_FEATURES_tune-aarch64} cortexa57-cortexa53"
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PACKAGE_EXTRA_ARCHS_tune-cortexa57-cortexa53 = "${PACKAGE_EXTRA_ARCHS_tune-aarch64} cortexa57-cortexa53"
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BASE_LIB_tune-cortexa57-cortexa53 = "lib64"
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